Understanding Memory Management and I/O Devices
WEEK 9 Round Robin Algorithm? How Does It Work?
A scheduling algorithm which has a time quantum. After that set quantum time, the process that was running is preempted and moved back to the arrival queue if it still has burst time remaining.
Demand Paging? Example of Demand Paging.
Demand paging is a method of virtual memory management. Demand paging follows that pages should only be brought into memory if the executing process demands them. This is often referred to as lazy evaluation as only those pages demanded by the process are swapped from secondary storage to main memory.
Advantages:
- Only loads pages that are demanded by the executing process.
- As there is more space in main memory, more processes can be loaded, reducing the context switching time, which utilizes large amounts of resources.
- Less loading latency occurs at program startup, as less information is accessed from secondary storage and less information is brought into main memory.
- As main memory is expensive compared to secondary memory, this technique helps significantly reduce the bill of material (BOM) cost in smartphones, for example. Symbian OS had this feature.
Disadvantages:
- Individual programs face extra latency when they access a page for the first time.
- Low-cost, low-power embedded systems may not have a memory management unit that supports page replacement.
- Memory management with page replacement algorithms becomes slightly more complex.
- Possible security risks, including vulnerability to timing attacks.
- Thrashing which may occur due to repeated page faults.
How Is the Abstraction of External Devices Helpful?
Abstraction allows us to create a general idea of what the problem is and how to solve it.
How Can a Basic I/O Device Be Controlled Using Only 4 Registers? Explain What Each Register Does.
Register is a small piece of memory where you can store data. Data-in: read by host to get input. Data-out: written by host to send output. Status: Bits to be read by host, indicate command completion and error status. Control: command to the device to be written by host.
How Are Interrupts Used to Allow External I/O Devices to Function More Efficiently?
Interrupts are better than polling since polling can occupy the CPU when the status of the controller is busy (busy wait). Interrupts, on the other hand, will not occupy the CPU unless that particular I/O sends an interrupt request (a wire which connects the CPU and the controller) via an electrical current.
What Are Some Considerations When Scheduling I/O Requests? Give an Example of Two Scheduling Choices and How Each Can Have Good and Bad Outcomes.
1. Performance Example: Process A wants to read block 1, process B wants to read block 5, and process C wants to read block 2. Performance will be faster when process A and Process C are allowed to read first. 2. Fairness Example: Process A submitted 1,000 I/O requests then Process B submitted 1. Satisfy Process B before completing all 1,000 from Process A. 3. Prioritization Example: Process A requested I/O before B, but B has a higher priority.
Why Does Buffering Exist (for I/O Devices)? What Negative Outcome Ensues from a Lack of Buffering?
1. To cope with device mismatch: i. Double buffering is used. ii. E.g. read in one buffer → when full → start writing to SSD → during writing use another buffer to keep reading. 2. To cope with device transfer size: i. E.g. one device operates in 1k blocks, another in 4K. 3. To maintain “copy semantics”: i. Need to ensure that the original version of the data is written.
What Is Direct Memory Access (DMA) and What Problem Is It Trying to Solve? Give an Example.
DMA access allows some devices to access memory directly without involving the CPU. A DMA is a piece of hardware which has a specialized controller that can write data straight to the memory instead of the device sending and receiving data from the CPU bit by bit via an interrupt. Data transfer can happen without keeping the CPU busy. DMA is used to avoid programmed I/O (one byte at a time). Remember DMA still needs the bus to transfer data from the I/O device, this is known as.
CONT WEEK 9
Cycle stealing.
Describe Pages and Why They Can Be Big and Small?
Pages are equal parts of logical memory blocks. Can be big or small as it is a power of 2 so can be 512 bytes to 16 Mbytes.
What Is the Difference Between Logical Addressing and Physical Addressing? Why Have Different Addressing Methods at All?
Logical- generated by CPU. Physical address – actual address in memory unit. Different as the user only deals with the logical address so it never uses physical address for protection.
Why Is Random Access So Much Slower Than Consecutive Access on Many External Memory Devices?
In the random access model, we position the head and then read only a little bit of data (only one block or one sector). So in the random access mode, we will repeatedly do this because we are trying to access different blocks one by one in their different positions. We need to position the head each time.
How Does Flash Memory Manage Memory Storage? What Are Some Considerations That Flash Memory Systems Must Take to Avoid Wearing Out?
Read and write in “page” (pages → similar to sectors for HDD). Must first be erased before writing something to memory, and erase happens in larger “block” increments. You might end up with a mix of valid and invalid pages, i.e. Let’s say you want to write data to a particular page and after some time you want to overwrite new data in this page. Well, this can’t be done since you need to erase the page first, and you might not be able to erase this page at this moment because you can only erase several pages at one. To counter that problem, the NAND flash controller algorithm marks this original page as invalid and writes data in some other page. Here are some important things that the NAND flash controller algorithm provides: Flash translation layer: This marking on invalid and valid pages is inside an FTL table. Garbage collection: freeing invalid pages. Overprovisioning: provide working space for garbage collection. Wear Leveling: Writing equally to each cell to have a higher lifespan.
How Can You Detect Errors?
Error detection determines if a problem has occurred. We can use a parity bit-based error detection code.
Parity? What Benefits Drawbacks Does It Give?
Parity means equal or equivalent. It is a technique that checks whether data has been lost or written over when it is moved from one place in storage to another or when it is transmitted between computers. Benefits: Error detection. Drawbacks: Introduce overhead → computation overhead → each time you read or write data you need to compute this parity bit.
What If There Are Two Bad Bits!
We can use Hamming codes, which can detect up to two-bit errors and can also correct one-bit errors without the knowledge of which bit is corrupted.
What Is RAID and How Does It Work? Give an Example of Different RAID Levels and What Benefits/Drawbacks They Yield.
Redundant Array of Inexpensive/Independent Disks. A storage technology that balances data protection, system performance, and storage space by determining how the storage system distributes data. Many different ways of distributing data have been standardized into various RAID levels. Example RAID level 0 (stripping). Sequential read request: 0,….,15. If only had one disk: read 0,1,2,3,…..,15. If reading from RAID level 0: read from disk 0: 0,4,8,12. Read from disk 1: 1,5,9,13. Read from disk 2: 2,6,10,14. Read from disk 3: 3,7,11,15. Benefits: 4x faster read/write request. Drawback: If any of those disks fail we will not be able to recover the data.