Understanding CPU Instruction Cycles and Control Unit Functions

Posted on Aug 6, 2024 in Computers

Functions of the Control Unit During Instruction Execution

The control unit is the part of the CPU responsible for directing operations. It sends control signals outside the CPU to manage data exchange with memory and I/O devices. It also issues internal control signals for data transfers between registers, ALU operations, and other internal tasks. The control unit receives input from the instruction register, flags, and control signals from the bus.

The control unit’s primary role is to orchestrate a sequence of elementary operations, called micro-operations, during each instruction cycle. It ensures the CPU executes these micro-operations in the correct order based on the program being run.

Key Components of the Control Unit

  • Program Counter (PC): Stores the memory address of the next instruction to be executed. It increments automatically after each instruction unless a jump or branch instruction modifies its value.
  • Instruction Register (IR): Holds the instruction currently being executed, including the opcode and operand references.
  • Instruction Decoder: Analyzes the opcode from the IR and generates control signals for other CPU components.
  • Clock: Provides a constant stream of pulses that synchronize the timing of micro-operations.
  • Sequencer: Generates the specific micro-operations needed to execute the instruction in the IR, synchronized with the clock pulses.

Two Basic Tasks of the Control Unit

  1. Sequencing: Determines the order of micro-operations based on the program’s instructions.
  2. Execution: Activates the necessary CPU components to carry out each micro-operation.

Control signals are essential for the control unit to perform these tasks.

Control Signals

Inputs:

  • Clock: Dictates when the control unit executes each micro-operation.
  • Instruction Register: Provides the opcode and operand information.
  • Flags: Indicate the CPU’s status and ALU operation results.
  • Control Bus Signals: Signals from the system bus.

Outputs:

  • Internal CPU Control Signals: Manage data transfers between registers and activate ALU functions.
  • Control Bus Signals: Control signals for memory and I/O modules.

Steps in Instruction Execution

  1. Fetch: The CPU retrieves the next instruction from main memory based on the address in the PC and loads it into the IR.
  2. Decode: The control unit decodes the opcode to determine the required ALU circuits and establishes the necessary connections.
  3. Operand Fetch: The CPU retrieves the operands required for the instruction from main memory.
  4. Execute: The ALU performs the operation specified by the opcode, and the result is stored in the ALU’s accumulator.
  5. Write Back (if necessary): If the instruction produces new data, it is stored in main memory.
  6. Update PC: The PC is incremented to point to the next instruction.

The control unit repeats this cycle at high speed, executing instructions sequentially to run programs.

Instruction Format

Instructions are the fundamental building blocks of computer programs. They are a structured sequence of bits that the processor interprets and executes.

An instruction typically represents a simple operation for the processor. Complex actions are broken down into sequences of machine instructions, forming a program. Instruction length varies depending on the computer architecture, ranging from 4 to 128 bits.

The CPU temporarily stores the instruction in the instruction register (IR) for decoding and execution.

Instruction Types

The instruction set architecture (ISA) defines the types of instructions a processor supports. The ISA also specifies the CPU’s source and destination registers and sometimes includes immediate values.

  • Data Transfer Instructions: Move data between memory locations or registers.
  • Arithmetic Instructions: Perform arithmetic operations using the ALU.
  • Logical Instructions: Carry out logical operations using the ALU.
  • Conversion Instructions: Convert data between different formats.
  • Control Transfer Instructions: Modify the program counter (PC) to control program flow, such as branching and subroutine calls.
  • I/O Instructions: Handle input and output operations.

Instruction Format Details

The instruction format specifies how the CPU interprets the bit pattern of a machine instruction. It defines the opcode, operands, and addressing modes.

Generally, an instruction includes the following fields:

  • Opcode: A binary code that specifies the operation to be performed (e.g., addition, subtraction).
  • Source Operand References: Identify the input data for the instruction, which can be registers or memory locations.
  • Result Operand Reference: Specifies where to store the result of the operation.
  • Next Instruction Reference: Indicates the address of the next instruction to be executed. In most cases, this is implicit and the next instruction is fetched sequentially.

The ISA is determined by factors such as:

  • Supported data types and formats (e.g., integers, floats, characters).
  • Addressing modes for accessing data in memory (e.g., immediate, direct, indirect).
  • The set of basic operations the processor can perform.

Micro-operations and Execution of a Fundamental Instruction

Micro-operations are the atomic operations performed by the CPU. The control unit manages the execution of these micro-operations.

Program execution involves a sequence of instruction cycles, with each cycle typically executing one machine instruction. Each instruction cycle consists of sub-cycles, including fetch, decode, operand fetch, execute, and interrupt handling. The fetch and execute sub-cycles are always present.

The Fetch Cycle

The fetch cycle retrieves the instruction from memory:

  1. The PC holds the address of the instruction to be fetched.
  2. The CPU sends the address from the PC to memory and reads the instruction into the Memory Buffer Register (MBR).
  3. The PC is incremented to point to the next instruction.
  4. The instruction is transferred from the MBR to the Instruction Register (IR).

The CPU waits for the memory to respond with the instruction. The Memory Function Complete (MFC) signal indicates completion.

Register Abbreviations

  • PC: Program Counter
  • MAR: Memory Address Register
  • MBR: Memory Buffer Register
  • IR: Instruction Register

Micro-operations in the Fetch Cycle

  1. t1: MAR <- (PC)
  2. t2: MBR <- (Memory)
  3. PC <- (PC) + 1
  4. t3: IR <- (MBR)

These micro-operations transfer data between registers and memory. The third operation (PC increment) can be grouped with the second or fourth.

The Indirect Cycle

If the instruction uses indirect addressing, an indirect cycle is performed to fetch the operand address from memory:

  1. t1: MAR <- (IR(address))
  2. t2: MBR <- (Memory)
  3. t3: IR <- (MBR(Address))

The Interrupt Cycle

After the execution cycle, the CPU checks for pending interrupts. If an interrupt is present, an interrupt cycle is performed:

  1. t1: MBR <- (PC)
  2. t2: MAR <- (Interrupt Vector Address)
  3. PC <- (Address of Interrupt Handler)
  4. t3: Memory <- (MBR)

The Execution Cycle

The execution cycle performs the operation specified by the opcode. The specific micro-operations depend on the instruction.

Example: Storing a Word in Memory

  1. t1: MAR <- [R1] (Load memory address from register R1)
  2. t2: MDR <- [R2] (Load data from register R2)
  3. t3: UC sends the Write signal
  4. t4: Wait for MFC signal

Example: Register Transfer

To transfer the contents of register R1 to R4:

  1. Enable the output gate of R1.
  2. Enable the input gate of R4.

Example: Arithmetic Operation

To add the contents of register R1 to R2 and store the result in R3:

  1. t1: Enable R1 output and ALU input A.
  2. t2: Enable R2 output and ALU input B. Set ALU operation to Add. Enable ALU output to Z register.
  3. t3: Enable Z register output and R3 input.

Execution Time and Wait Cycles

The CPU executes instructions sequentially, and each micro-operation takes time. The clock cycle is the basic unit of time for processor operations.

A clock cycle can be divided into phases, each corresponding to specific micro-operations. For example, a phase might involve shifting a register, transferring data to a bus, or incrementing a counter.

The control unit manages the address of the current instruction in the PC. The execution time of an instruction can be optimized by overlapping operations, such as fetching the next instruction while waiting for memory access to complete.

The clock cycle, also known as clock speed or frequency, is measured in Hertz (Hz). A higher clock speed generally means faster processing.

Rules for Grouping Clock Cycles


· They must follow the correct sequence of events
MAR
Doctors should avoid conflicts
Do not read and write the same record at same time
MBR
· Also: PC Use the ALU
You may need additional micro

3.3 micro-CYCLE AND PERFORMANCE OF A FUNDAMENTAL INSTRUCTION
The micro-operations are the functional or atomic operations of the CPU and the control unit controls the operation of the CPU.
The execution of a program is to perform a sequence of instruction cyclesion, with one machine instruction per cycle. Each instruction cycle can be considered consists of several small units. Practice is a subdivision collection, indirect cycle, execution, and stopping. Those who are always the capture and execution. Each subcycle of an instruction involves a series of steps, each of which requires the use of CPU registers. Each cycle involves a series of small steps and use of CPU registers (micro).


The acquisition cycle
The instructions form a program are stored sequentially in memory. Brings the CPU to execute one instruction at a time and performs the functions specified. This process is called acquisition cycle and is done at the beginning of each instruction cycle.

First step. Bring the address of the instruction to execute.

Second step. Bringing the instruction to execute.

The CPU waits for a response that the transaction has been completed. This is achieved by another control signal memory bus: MFC (Memory Function Complete).





This step should also be updated contents of PC to contain the address of the next instruction to execute.

Third step. Transfer the data stored in MBR the instruction register IR releasing the MBR for use during a possible indirect cycle.



For reasons of practicality, the various registers are usually abbreviated as follows:






The acquisition cycle consists of three steps (transfer) and four micro-operations. Each micro-operation involves transferring data into or out of a record. The sequence can be represented as:

t1: MAR t2: MBR PC t3: IR
The third operation is grouped with the second, but can also be grouped with the fourth without a problem. Clusters of micro must meet:
· Follow the correct sequence of events.
· Avoid conflicts.

The indirect cycle
Once you have the microinstrucciion, the next step is to capture source operands. The instruction format requires a direct or indirect addressing. It is a direct address when source operands are within the statement. If the instruction specifies an indirect address, then you must make an indirect cycle by cycle execution. The indirection is to obtain the address stored in another memory location. The micro involved are:

t1: MAR t2: MBR t3: IR
The interrupt cycle
When completed the implementation cycle, a check is performed to determine if any interrupt is enabled. If so, you place an interrupt cycle. From one machine to another varies, but a simple sequence of events is:
t1: MBR t2: MAR PC t3: Memory
Implementation Cycle
In a machine with N different opcodes, different sequences can occur in micro-N.

Storing a word in memory .- The process of writing a word is akin to reading. The difference is that writing the word is loaded into the MDR before issuing the write command.

Example: Consider the word to write is in register R2, and that the address is in register R1. The micro-sequence is:

t1: MAR t2: MDR t3: UC sends the signal Write
t4: Wait MFC signal

Transfer of register .- To allow the transfer of data between multiple registers connected to the common bus is used for handling input and output gate.
Example: Transfer the contents of register R1 to R4. The sequence of operations is:
– Enable log output gate R1 putting R1salida to 1. This puts the contents of R1 on the CPU bus.
– Enable the log entry gate R4 putting R4entrada to 1. This loads the data from the bus in the register R4.
Execution of an arithmetic operation performed .- When an arithmetic or logic, it must be remembered that the ALU is a combinational circuit itself has no internal storage. The Y register is used to contain one of the operands and the other is driven by gate to the bus. The result is stored temporarily in the register Z.

Example: Add the contents of register R1 to the R2 register and store the result in R3. The sequence of operations is:
t1: R1 exit and entry
t2: R2 output, Add, Z input
t3: Z output, input R3
Flow diagram of the instruction cycle




INSTRUCTION 3.2 Format
They are a set of data inserted into a structured sequence or specify that the processor interprets and executes.

In Computing, an instruction typically refers to a simple operation that is given to a processor and that this take place. A complex action should be coded as a sequence of machine instructions in what is called a program.

The size or length of the instruction depends on the architecture, varying from 4 to 128 bits.

The instruction must be stored temporarily (in the instruction register, RI) for the CPU at your content and extract the data it contains. This step is called decoding.


Instruction Types

The permitted types of instruction are defined and determined within each platform architecture instruction repertoire ISA (instruction set architecture), which also determines the source and destination registers of the CPU, and sometimes an immediate given.

Data Transfer Instructions: In this type of instruction, data is transferred from one location to another. The steps you follow to do this are:

1) Identification of the source and destination addresses of memory.
2) Making the transformation of virtual memory to real memory.
3) Check the cache.
4) Start of read / write memory.

Arithmetic instructions: may involve transfer of data before and / or after. Perform arithmetic operations in charge of the ALU.

Logical Instructions: like arithmetic, the ALU is responsible for performing these operations, which in this case are of type logical.

Conversion Instructions: Similar to the arithmetic and logic. They may involve special logic to perform the conversion.

Control Transfer Instructions: updating the program counter (PC). Manage calls / returns to subroutines, parameter passing and linking.

Instructions for I / O (input / output) commands given input / output. If there is a memory map input / output, determines the address of the memory map.

Format
The format of the instructions is a set of specifications that indicate how it should be interpreted by the bit pattern for a machine instruction in order to complete its execution within the computer.
The format of the instruction indicates which is the operation code and operands which specifies that the instruction, both explicit and implicit.

In general, an instruction that encodes a basic operation performed on a computer data located in memory or in machine registers and accessing using an addressing mode.

Therefore, the ISA of a processor architecture is determined by the following factors:
· Data types and formats that can handle the instructions: natural, integers, floats, characters, etc..
· Ways of addressing data in memory: immediate, direct, indirect, and so on. These two factors are crucial to the efficient implementation of complex data structures of a high-level language.
· Basic set of operations that can be performed on the data: addition, subtraction, etc..
Information on the three factors above are encoded in each of the instructions following a prescribed format. The format will determine the length in bits of the instructions and the fields that encode the value of those factors.
In general instruction consists of the following fields:
· Opcode (CO). Specifies the operation to perform (addition, subtraction, E / S, etc..), The operation is indicated by a binary code.
· Reference source operands (OP1, OP2 ,…): The operation may involve one or more source operands, ie operands are input to the instruction (Typically, the number of source operands of a code does not Pass 2).
· Reference to the operating result (OPD).The operation can produce a result.
· Reference to the following statement (IS). It tells the CPU where to catch the next instruction after completion of the current instruction execution. The next instruction to capture this in main memory. In most cases, the following statement immediately follows the instruction execution. In such cases there is no explicit reference to the following statement. Where necessary an explicit reference should be supplied memory address.




3.1 Functions UNIT CONTROL DURING THE EXECUTION OF INSTRUCTION
The control unit is the CPU that is responsible for making things happen, and that emits signals external to the CPU control to produce the data exchange with the memory modules and I / O It also issues internal control signals to transfer data between registers, making the ALU to perform a function and other internal operations. The entrance to the control unit is composed of the instruction register, indicators, and control signals.

The primary responsibility is the control unit to make that a sequence of elementary operations, called micro-operations, during the development of an instruction cycle.

The main function of the control unit of the PCU is to direct the sequence of steps so that the computer performs a full cycle of instruction execution, and doing so with all the instructions stating the program.

Following the interpretation of the instructions that make up the program this unit generates the basic commands needed to perform the task is needed.

To perform its function, the control unit comprises the following elements:

· Program counter. Provides permanent memory address of the next instruction to execute. When starting the execution of a program takes the address of its first instruction. Increases its value by one, automatically, whenever an instruction is concluded, unless the instruction being executed is breaking jump or sequence, in which case the program counter will address the instruction then have to run, this address is in the instruction in progress.
· Registry of instruction. It contains the instruction being executed at any time. This instruction will entail the operation code (a code indicating what type of operation to be performed, such a sum) and if the operands (data on acting instruction, for example the numbers add up) or memory addresses of these operands.
· Decoder. Responsible for extracting the operation code of the current instruction (which is in the instruction register), analyzes it and sends signals to other elements necessary for its implementation through the sequencer.
· Clock. It provides a succession of electrical pulses or cycles at a constant (frequency), which mark the moments when he must begin the various steps involved in each statement.
· Sequencer. This device generates very basic commands (microcomputer) which, synchronized by the clock pulses will cause it to gradually implement the instruction that is loaded into the instruction register.


The control unit performs two basic tasks:
· Sequencing. The control unit causes the CPU to step through a series of micro-operations in the appropriate sequence, based on the program is running.
· Implementation. The control unit it runs each micro.
The key to how the control unit is by using control signals.
Control signals
The entries are:
· Clock. The control unit does run a micro (or set) on each clock pulse.
Instruction · Registry. Micro Determines that must be done.
· Indicators. Used to determine the state of the CPU and the result of previous operations of the ALU.
· Control signals control the bus. Control signals from the system bus.
The outputs are:
· Internal control signals CPU .- To transfer data from one record to another and to activate specific ALU functions.
· Control signals to the control bus .- control signals and memory control signals modules / O


The steps to execute any instruction are:

1) is removed from main memory to execute the instruction that information is stored in the instruction counter, the information stored is the next instruction to be executed in the instruction register itself. This step is called a cycle of fetch in the computational literature (to fetch means to bring, go by).

2) Once you know the operation code control unit knows that UAL circuits must intervene can be established electrical connections through the sequencer.

3) Extract from main memory the data needed to execute the instruction in progress.

4) Regulates the AUL that performs operations the result of this is deposited in the accumulator of the AUL.

5) If the investigation has provided new data they are stored in main memory.

6) Increase by one the contents of the counter of instructions executed.

The control unit run several times this cycle at an enormous speed.
These instructions do not reside in memory or written by any programmer, but the machine runs directly through electronic means and make it while you are working (while on) on a computer is at a rate of hundreds of thousands (or even millions ) times per second.