PIC18 Microcontroller Architecture and Assembly Language Programming

Posted on May 7, 2024 in Computers

PIC18 Microcontroller Overview

CPU Architecture

The PIC18 microcontroller features a powerful CPU with the following key components:

  • ALU (Arithmetic Logic Unit): Performs arithmetic and logical operations.
  • Instruction Decoder: Decodes 16-bit instructions.
  • Status Register: Stores 5-bit flags indicating the CPU’s state.
  • WREG: An 8-bit working register used for temporary data storage.

Registers

The PIC18 provides various registers for program execution and data management:

  • Program Counter (PC): A 21-bit register holding the address of the next instruction to be executed.
  • Bank Select Register (BSR): A 4-bit register selecting the active register bank.
  • File Select Register (FSR): A 12-bit register used to access data memory.

Memory Organization

The PIC18 has separate address and data buses for program and data memory:

  • Program Memory: 21-bit address bus (2MB) and 16-bit data bus (32KB).
  • Data Memory: 12-bit address bus (4KB) and 8-bit data bus (4KB).

I/O Ports

The PIC18 provides five I/O ports (PortA to PortE) for interfacing with external devices.

Memory Types

The PIC18F4520 model has two main memory types:

  • GPR (General Purpose Registers): 1536 bytes for storing variables.
  • SFR (Special Function Registers): 128 bytes for controlling CPU functions, including WREG and Status Register.

Additional Registers and Flags

  • Stack Pointer: A 5-bit register pointing to the top of the hardware stack.
  • Stack: 31 registers, each 21 bits wide, used for temporary storage during function calls and interrupts.
  • Table Pointer: A 21-bit register used as a memory pointer for copying data between program and data memory.
  • Flags: Negative (N), Overflow (OV), Carry (C), Zero (Z), and Digital Carry (DC) flags indicate the results of arithmetic and logical operations.

PIC18 Assembly Language Instructions

Data Movement Instructions

  • MOVLW k: Moves an 8-bit literal value (k) into WREG.
  • MOVLB b: Loads the Bank Select Register with the specified bank number (b).
  • MOVWF f: Moves the contents of WREG to a file register (f).
  • MOVFF fs, fd: Copies the contents of a source file register (fs) to a destination file register (fd).

Arithmetic and Logic Instructions

  • ADDLW k: Adds a literal value (k) to WREG.
  • ADDWF f, d: Adds the contents of WREG to a file register (f) and stores the result in the specified destination (d).
  • SUBLW k: Subtracts WREG from a literal value (k).
  • SUBWF f, d: Subtracts WREG from a file register (f) and stores the result in the specified destination (d).
  • ANDLW k: Performs a bitwise AND operation between WREG and a literal value (k).
  • IORLW k: Performs a bitwise OR operation between WREG and a literal value (k).
  • XORLW k: Performs a bitwise XOR operation between WREG and a literal value (k).

Bit Manipulation Instructions

  • BSF f, b: Sets a specific bit (b) in a file register (f) to 1.
  • BCF f, b: Clears a specific bit (b) in a file register (f) to 0.
  • BTG f, b: Toggles a specific bit (b) in a file register (f).
  • BTFSC f, b: Skips the next instruction if the specified bit (b) in a file register (f) is 0.
  • BTFSS f, b: Skips the next instruction if the specified bit (b) in a file register (f) is 1.

Control Flow Instructions

  • GOTO label: Unconditionally jumps to the specified label.
  • BRA label: Performs a relative branch to the specified label within a limited range.
  • CALL label: Calls a subroutine at the specified label.
  • RCALL label: Performs a relative call to a subroutine within a limited range.
  • RETURN: Returns from a subroutine.
  • RETLW k: Returns from a subroutine and places a literal value (k) in WREG.

Assembler Directives

  • ORG address: Sets the origin address for the subsequent instructions.
  • END: Indicates the end of the source code.
  • EQU value: Associates a constant value with a label.
  • SET value: Similar to EQU, but the value can be reassigned.

Additional Concepts

I/O Port Configuration

  • TRISx register: Controls the direction of each I/O pin (input or output).
  • Clrf TRISx: Sets the corresponding port pins as outputs.
  • Setf TRISx: Sets the corresponding port pins as inputs.

LED Control

  • Common Cathode LED: A logic 1 turns on the LED.
  • Common Anode LED: A logic 0 turns on the LED.

Time Delay

Each instruction cycle in the PIC18 takes four clock cycles, which is equivalent to one machine cycle. Time delays can be implemented using loop structures and instruction cycle counts.

Advanced Arithmetic and Logic Instructions

  • ADDWFC f, d: Adds the contents of WREG, a file register (f), and the Carry flag, storing the result in the specified destination (d).
  • SUBWFB f, d: Subtracts WREG and the Borrow flag from a file register (f), storing the result in the specified destination (d).
  • SUBFWB f, d: Subtracts a file register (f) and the Borrow flag from WREG, storing the result in the specified destination (d).
  • MULLW k: Multiplies WREG by a literal value (k), storing the 16-bit result in the PRODH and PRODL registers.
  • ANDWF f, d: Performs a bitwise AND operation between WREG and a file register (f), storing the result in the specified destination (d).
  • IORWF f, d: Performs a bitwise OR operation between WREG and a file register (f), storing the result in the specified destination (d).
  • XORWF f, d: Performs a bitwise XOR operation between WREG and a file register (f), storing the result in the specified destination (d).
  • NEGF f: Negates (two’s complement) the contents of a file register (f).
  • CPFSGT f: Compares a file register (f) with WREG and skips the next instruction if the file register is greater.
  • CPFSEQ f: Compares a file register (f) with WREG and skips the next instruction if they are equal.
  • CPFSLT f: Compares a file register (f) with WREG and skips the next instruction if the file register is less.
  • RRNCF f, d: Rotates the contents of a file register (f) one bit to the right, without affecting the Carry flag.
  • RLNCF f, d: Rotates the contents of a file register (f) one bit to the left, without affecting the Carry flag.
  • SWAPF f, d: Swaps the upper and lower nibbles of a file register (f).

Conclusion

This document provides a comprehensive overview of the PIC18 microcontroller architecture, assembly language instructions, and programming concepts. By understanding these fundamentals, you can effectively develop embedded systems using the PIC18 platform.