Operating System Concepts: Virtual Memory and I/O Mechanisms

What Is Virtual Memory?

Virtual memory is a memory management technique that gives programs the illusion of having a large, continuous block of memory—even if the physical RAM is limited. It allows the system to use disk space (like HDD/SSD) as an extension of RAM.

Key Capabilities Enabled by Virtual Memory

  • Running large applications
  • Multitasking
  • Memory protection and isolation

Virtual Memory Implementation Methods

Paging

Memory is divided into fixed-size blocks:

  • Pages (virtual memory)
  • Frames (physical memory)

A page table maps virtual pages to physical frames. If a page isn’t in RAM, it’s loaded from disk (this process involves page faults).

Segmentation

Memory is divided into logical segments: code, data, stack, etc. Each segment has a base and limit. Segmentation offers better logical organization but can suffer from fragmentation.

Note: Many modern systems use a combination of paging and segmentation for flexibility and protection.

Advantages of Virtual Memory

FeatureBenefit
IsolationEach process gets its own address space, preventing accidental interference.
MultitaskingMultiple programs can run simultaneously without memory clashes.
Memory ProtectionPrevents one process from accessing another’s memory space.
Efficient Use of RAMOnly needed pages are loaded into RAM; the rest remain on disk.
Simplified ProgrammingDevelopers do not need to manage physical memory directly.

Understanding Page Faults

A page fault occurs when a program tries to access a page that is not currently loaded into physical RAM.

The Page Fault Handling Process

  1. The CPU traps to the Operating System (OS) via an interrupt.
  2. The OS checks if the memory access is valid.
  3. If valid, the OS performs the following steps:
    • Finds a free frame (or evicts an existing one using a replacement algorithm).
    • Loads the required page from disk into RAM.
    • Updates the page table entry.
    • Resumes the program execution.

I/O Transfer Methods Comparison

Programmed I/O vs. Interrupt-Driven I/O vs. DMA

FeatureProgrammed I/O (PIO)Interrupt-Driven I/ODirect Memory Access (DMA)
CPU InvolvementConstantly polls the device (busy-waiting).CPU is interrupted only when the device is ready.CPU initiates the transfer, then the DMA controller handles it independently.
EfficiencyLow (CPU is heavily utilized).Better (CPU can perform other tasks).High (CPU is free during the transfer).
Data TransferWord-by-word, handled by the CPU.Word-by-word, handled by the CPU after an interrupt.Block transfer, handled by the DMA controller.
Hardware NeededNone.Interrupt controller.DMA controller.
Use CaseSimple, low-speed devices.Moderate-speed devices.High-speed devices (disk drives, graphics cards, etc.).

I/O Mapped I/O vs. Memory-Mapped I/O

FeatureI/O Mapped I/OMemory-Mapped I/O (MMIO)
Address SpaceSeparate I/O address space.Shares the main memory address space.
Instructions UsedSpecial I/O instructions (e.g., IN, OUT).Regular memory instructions (e.g., MOV).
Address LinesFewer (often 8-bit).Same as memory (e.g., 16-bit or 32-bit).
SpeedSlightly slower due to specialized instruction decoding.Faster due to uniform access methods.
Example8085/8086 architecture using IN AL, 60H.Accessing a device register using MOV AL, [1234H].

Architectural Diagram Comparison

I/O Mapped I/O:          Memory-Mapped I/O:
    CPU                      CPU
     |                        |
  I/O Bus                  Memory Bus
     |                        |
I/O Devices          I/O + Memory Devices

Direct Memory Access (DMA) Explained

DMA allows peripherals to transfer data directly to or from memory without constant CPU intervention. The DMA controller takes over the system bus to manage the transfer, significantly freeing the CPU for other tasks.

Advantages of DMA

  • Faster data transfer, especially for large blocks.
  • The CPU is free to execute other instructions simultaneously.
  • Efficient bus usage.
  • Ideal for high-speed devices like disk drives and graphics cards.

The DMA Operation Cycle

Steps:

  1. The CPU sets up the DMA controller (specifying source, destination, and transfer size).
  2. The CPU issues the DMA request and resumes other tasks.
  3. The DMA controller takes control of the system bus.
  4. Data is transferred directly between the I/O device and memory.
  5. The DMA controller sends an interrupt to the CPU when the transfer is complete.

DMA Data Path Diagram

[ I/O Device ] <--> [ DMA Controller ] <--> [ Memory ]