Flip-Flops, Registers, and Sequential Circuit Fundamentals
Flip-Flops: Basic Sequential Data Storage
A Flip-Flop is a basic sequential circuit used to store one bit of data (0 or 1). Unlike combinational circuits, the output of a flip-flop depends on:
- Present input
- Previous output (memory)
- Clock signal
Flip-flops are the building blocks of registers, counters, and memory units.
1. RS (Set-Reset) Flip-Flop
The RS flip-flop has two inputs: S (Set) and R (Reset).
Working Principle
- S = 1 → Output is set to 1
- R = 1 → Output is reset to 0
- S = R = 0 → No change
- S = R = 1 → Invalid condition
Truth Table (RS Flip-Flop)
| S | R | Q (Next State) |
|---|---|---|
| 0 | 0 | No change |
| 0 | 1 | 0 |
| 1 | 0 | 1 |
| 1 | 1 | Invalid |
Limitation
The invalid state makes the RS flip-flop less reliable.
2. D (Data / Delay) Flip-Flop
The D flip-flop has one input (D) and one clock signal.
Working Principle
On the clock pulse, output Q follows input D. There is no invalid condition.
Truth Table (D Flip-Flop)
| D | Q (Next) |
|---|---|
| 0 | 0 |
| 1 | 1 |
Advantages
- Simple design
- No invalid state
- Used extensively in registers and memory
3. JK Flip-Flop
The JK flip-flop is an improved version of the RS flip-flop.
Inputs
- J (Set)
- K (Reset)
Working Principle
- J = 1, K = 0 → Set (Q = 1)
- J = 0, K = 1 → Reset (Q = 0)
- J = K = 0 → No change
- J = K = 1 → Toggle (output changes state)
Truth Table (JK Flip-Flop)
| J | K | Q (Next) |
|---|---|---|
| 0 | 0 | No change |
| 0 | 1 | 0 |
| 1 | 0 | 1 |
| 1 | 1 | Toggle |
Advantage
Removes the invalid condition found in the RS flip-flop.
4. T (Toggle) Flip-Flop
The T flip-flop has one input (T).
Working Principle
- T = 0 → No change
- T = 1 → Output toggles (Q changes to Q’)
Truth Table (T Flip-Flop)
| T | Q (Next) |
|---|---|
| 0 | Q |
| 1 | Q’ |
Applications
- Used in counters
- Frequency division
5. Master-Slave Flip-Flop
A Master-Slave flip-flop uses two cascaded flip-flops: a Master and a Slave.
Working Principle
- The Master works when the clock signal is high (Clock = 1).
- The Slave works when the clock signal is low (Clock = 0).
- This configuration prevents the race-around condition.
Advantages
- Stable output
- No unwanted toggling
Disadvantages
- Complex circuit design
- More hardware required
6. Triggering Methods for Flip-Flops
- Level Triggering: The flip-flop responds while the clock signal is high or low.
- Edge Triggering: The flip-flop responds only at the transition (edge) of the clock signal:
- Rising edge (positive transition)
- Falling edge (negative transition)
Modern digital systems mostly use edge-triggered flip-flops.
7. Key Applications of Flip-Flops
- Registers
- Counters
- Memory units (RAM)
- Shift registers
- Digital clocks
- CPU control units
Registers: Data Movement and Storage
Registers are groups of flip-flops used to store multiple bits of data and facilitate data movement.
1. SISO (Serial-In Serial-Out) Register
In a SISO register, data enters one bit at a time and leaves one bit at a time.
Working Principle
- Data is shifted one position for every clock pulse.
- Output is obtained after the required number of clock pulses.
Features
- Simple design
- Slow data transfer rate
Applications
- Serial communication
- Delay circuits
2. SIPO (Serial-In Parallel-Out) Register
In a SIPO register, data is entered serially, but the output is obtained in parallel form.
Working Principle
- Bits enter one by one.
- After n clock pulses (where n is the register size), all bits appear at the output simultaneously.
Features
- Performs serial-to-parallel conversion.
- Faster output retrieval than SISO.
Applications
- Keyboard interfaces
- Data reception in communication systems
3. PISO (Parallel-In Serial-Out) Register
In a PISO register, data is entered in parallel, and the output is obtained serially.
Working Principle
- All bits are loaded at once.
- Bits are shifted out one by one on each clock pulse.
Features
- Performs parallel-to-serial conversion.
- Requires a control signal (load/shift).
Applications
- Data transmission
- Communication between the CPU and peripherals
4. PIPO (Parallel-In Parallel-Out) Register
In a PIPO register, data is entered and taken out in parallel form.
Working Principle
- Data loads and outputs simultaneously.
- Fastest among all register types.
Features
- No shifting required for output.
- High-speed operation.
Applications
- Temporary data storage
- CPU registers (e.g., Accumulator, Data Register)
5. Shift Registers
A Shift Register is a specific type of register that shifts data either left or right with each clock pulse.
Types of Shift Registers
- Left shift register
- Right shift register
- Bidirectional shift register
Applications
- Arithmetic operations (multiplication/division)
- Data manipulation
- Serial communication
Sequential Circuit State Concepts
1. Introduction to State Concepts
In sequential circuits, the output depends not only on present inputs but also on past history. This past information is stored in the form of states using flip-flops. A state represents the stored information of a sequential circuit at a particular time.
2. Defining a State
A State is the condition of a sequential circuit determined by the values stored in its flip-flops.
- Each flip-flop stores 1 bit.
- For n flip-flops, there are 2ⁿ possible states.
Example: If 2 flip-flops are used, there are 4 states (00, 01, 10, 11).
3. State Table
A State Table is a tabular representation that shows:
- Present state
- Input
- Next state
- Output
It describes the complete behavior of a sequential circuit.
General State Table Format
| Present State | Input | Next State | Output |
|---|---|---|---|
| … | … | … | … |
Importance of State Tables
- Easy to understand circuit behavior.
- Used in designing sequential circuits.
- Helps in deriving flip-flop inputs.
4. State Diagram
A State Diagram is a graphical representation of states and transitions between them.
- States are shown as circles.
- Transitions are shown using arrows.
- Input/output conditions are written on the arrows.
Advantages of State Diagrams
- Provides visual understanding.
- Easy to detect missing states.
- Helpful in circuit design.
5. State Equation
A State Equation mathematically represents the next state of the circuit.
General form: Q(next) = f(Q, Input)
Where:
- Q = present state
- Q(next) = next state
State equations help in logic implementation.
Characteristic and Excitation Tables
A Characteristic Table shows how the next state of a flip-flop depends on its present state (Q) and its inputs.
(a) RS Flip-Flop Characteristic Table
| Q (Present) | S | R | Q (Next) |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 1 |
| 0 | 1 | 1 | Invalid |
| 1 | 0 | 0 | 1 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
| 1 | 1 | 1 | Invalid |
(b) D Flip-Flop Characteristic Table
| Q (Present) | D | Q (Next) |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
(c) JK Flip-Flop Characteristic Table
| Q (Present) | J | K | Q (Next) |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 1 |
| 0 | 1 | 1 | 1 (Toggle Q’) |
| 1 | 0 | 0 | 1 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
| 1 | 1 | 1 | 0 (Toggle Q’) |
(d) T Flip-Flop Characteristic Table
| Q (Present) | T | Q (Next) |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
An Excitation Table shows the required inputs (S, R, D, J, K, or T) needed to achieve a desired state transition from Q (Present) to Q (Next).
(a) RS Flip-Flop Excitation Table
| Q (Present) | Q (Next) | S | R |
|---|---|---|---|
| 0 | 0 | 0 | X |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 0 | 1 |
| 1 | 1 | X | 0 |
(b) D Flip-Flop Excitation Table
| Q (Present) | Q (Next) | D |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
(c) JK Flip-Flop Excitation Table
| Q (Present) | Q (Next) | J | K |
|---|---|---|---|
| 0 | 0 | 0 | X |
| 0 | 1 | 1 | X |
| 1 | 0 | X | 1 |
| 1 | 1 | X | 0 |
(d) T Flip-Flop Excitation Table
| Q (Present) | Q (Next) | T |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
(X = Don’t care condition)