Computer I/O Interfaces and Data Transfer Techniques
Understanding Computer I/O Interfaces
The input/output (I/O) interface provides a method for transferring information between internal storage devices and external I/O peripherals. Peripherals connected to a computer require a special communication link to operate as an interface with the Central Processing Unit (CPU). The purpose of this communication link is to resolve the differences and focus the computer’s attention on each peripheral. The main differences are:
- Electromechanical vs. Electronic Devices: Peripherals are electromechanical and electromagnetic devices, and their mode of operation differs from the CPU and memory, which are electronic devices. Therefore, signal value conversion may be required.
- Data Transfer Speed Discrepancy: The data transfer speed of peripherals is typically less than the transfer speed of the CPU. This often necessitates a synchronization mechanism.
- Varying Data Codes and Formats: Data codes and formats for peripherals differ from the word format used by the CPU and memory.
- Diverse Peripheral Operation Modes: The operation modes of peripherals vary, and each must be controlled to avoid disrupting the operation of other peripherals connected to the CPU.
To resolve these differences, computer systems include special circuitry components between the CPU and peripherals to monitor and synchronize all transfers in and out. These components are called interfaces because they communicate with both the processor and also with the peripheral.
Computer Data Transfer Methods
The transfer of data to and from peripherals can be handled in one of three possible ways:
1. Programmed I/O
Programmed I/O operations are the result of specific I/O instructions written into a program. Each data transfer is initiated by an instruction within the program. Generally, the transfer occurs to and from a CPU register or a peripheral. Other instructions are needed to transfer data between the CPU and memory. Once a data transfer begins, the CPU needs to monitor the interface to determine if it can proceed with another transfer. This method relies on scheduled instructions executed by the CPU to observe everything happening in the interface unit and the I/O device.
2. Interrupt-Driven I/O
In the interrupt-driven I/O method, the CPU stays in a program loop until the I/O unit indicates it is ready for data transfer. This is a time-consuming process because it keeps the processor unnecessarily busy. This inefficiency can be avoided by using an interrupt option, allowing the CPU to execute another program in the meantime. During this time, the CPU continues to monitor the interface devices. When the interface determines that the device is ready for data transfer, it generates an interrupt request to the computer. Upon detecting the external interrupt, the CPU momentarily stops its current process, transfers control to a service program to handle the I/O transfer, and then returns to the task it was originally executing.
3. Direct Memory Access (DMA)
With Direct Memory Access (DMA), the interface transfers data directly into and out of the memory unit via the memory channel. The CPU initiates the transfer by providing the interface with the initial address and the number of words to be transmitted, and then proceeds to execute other tasks. When the transfer is complete, the DMA controller requests memory cycles. Once granted, the DMA transfers data directly to memory. The CPU only delays its memory access operation to allow direct I/O to memory transfer. Since the speed of peripherals is usually slower than the processor’s speed, I/O memory transfers are infrequent compared to processor memory access.
DMA Controller and Data Transfer Speed
The transfer of data between a magnetic device and memory is often limited by CPU speed. Removing the CPU from the data path and allowing the peripheral device to directly manage memory channels would significantly improve transfer speed. This transfer technique is called Direct Memory Access (DMA). During a DMA transfer, the CPU is inactive and has no control over the memory channels. A DMA controller operates on these channels to handle the transfer directly between the I/O device and memory.
Cycle Stealing
Cycle stealing is an alternative technique that allows the DMA controller to transfer one data word at a time, after which it must return control of the channel to the CPU. The CPU only delays its operation for a single memory cycle to allow the direct I/O to memory transfer, hence the term “memory cycle stealing.”