Computer Architecture: Key Concepts and Principles

Posted on Apr 1, 2026 in Computers

Von Neumann Architecture

Definition: The Von Neumann Architecture is a computer design model proposed by John von Neumann in which data and instructions are stored in the same memory and share the same communication path.

Main Components

  • Central Processing Unit (CPU): Executes instructions (ALU + Control Unit).
  • Memory Unit: Stores both data and programs.
  • Input Unit: Takes input from the user.
  • Output Unit: Displays results.
  • System Bus: Transfers data between components.

Key Feature: Uses single memory for both instructions and data.

Hazards in Computer Architecture

Definition: A hazard is a condition in instruction pipelining where the next instruction cannot execute properly in the next clock cycle, causing delay or incorrect results.

Types of Hazards

1. Data Hazard

Occurs when an instruction depends on the result of a previous instruction.

Types:

  • RAW (Read After Write): Most common (true dependency).
  • WAR (Write After Read)
  • WAW (Write After Write)

Example:
I1: R1 = R2 + R3
I2: R4 = R1 + R5 (depends on I1 result)

2. Control Hazard (Branch Hazard)

Occurs due to branch or jump instructions, where the next instruction address is not known immediately (e.g., if-else, loop statements).

3. Structural Hazard

Occurs when hardware resources are insufficient to execute multiple instructions at the same time (e.g., two instructions needing the same memory simultaneously).

Pipelining in Computer Architecture

Definition: Pipelining is a technique where multiple instructions are executed simultaneously by dividing the process into different stages. It improves CPU performance and throughput.

Types of Pipelining

  • Instruction Pipelining: Different stages of instruction execution are overlapped. Stages: Fetch → Decode → Execute → Memory → Write Back.
  • Arithmetic Pipelining: Used for complex arithmetic operations (like floating-point addition/multiplication). Each stage performs part of the calculation.

Working Principle: The instruction execution is divided into stages, where each stage works on a different instruction at the same time.

Stages of the Instruction Cycle

1. Instruction Fetch (IF)

  • The instruction is fetched from memory using its address.
  • The address of the next instruction is stored in the Program Counter (PC).
  • The PC value is transferred to the Memory Address Register (MAR).
  • The instruction is fetched from memory and stored in the Instruction Register (IR).

2. Instruction Decode (ID)

  • The instruction is decoded by the Control Unit.
  • The opcode and operand parts are identified.
  • Opcode specifies the type of operation; control signals are generated for execution.

3. Execute (EX)

  • The required operation is performed by the ALU.
  • Arithmetic or logical operations are executed.
  • In case of branch instructions, the condition is checked.

4. Memory Access (MEM)

  • If required, data is read from or written to memory (used in LOAD and STORE instructions).

5. Write Back (WB)

  • The result of execution is stored back into registers or memory.

Amdahl’s Law

Definition: Amdahl’s Law states that the overall speedup of a system due to improvement in one part is limited by the portion of the system that is not improved.

Formula: S = 1 / ((1 - p) + (p / Sp))

Where:
S = Overall speedup
P = Fraction of program improved
Sp = Speedup of the improved part