Combinational Logic Circuits: Adders, Subtractors & MUX

Half Adder

Half Adder: A half adder is a basic combinational logic circuit used to add two single-bit binary numbers. It produces two outputs called Sum and Carry. It is called a half adder because it does not consider any carry input from a previous stage.

Inputs and Outputs

  • Inputs: A, B
  • Outputs: Sum (S), Carry (C)
  • Operation performed: A + B

Working Principle

  • When both input bits are 0, the Sum and Carry are 0.
  • When one input is 1 and the other is 0, the Sum is 1 and Carry is 0.
  • When both inputs are 1, the Sum is 0 and Carry is 1.
  • Thus, the half adder adds two binary digits correctly but cannot add a carry from a previous addition.

Truth Table

A B  Sum (S)  Carry (C)
0 0    0         0
0 1    1         0
1 0    1         0
1 1    0         1
  

Boolean Expressions

From the truth table:

  • Sum: S = A ⊕ B
  • Carry: C = A · B

This shows that the Sum is obtained using an XOR gate and Carry using an AND gate.

Logic Circuit

  • An XOR gate is used to generate the Sum.
  • An AND gate is used to generate the Carry.
  • Thus, a half adder requires one XOR gate and one AND gate.

Limitations

  • Cannot add carry from a previous stage.
  • Not suitable for multi-bit addition.
  • Used only as a basic building block.

Applications

  • Used in arithmetic circuits.
  • Used in calculators.
  • Forms the base for full adder design.
  • Used in ALU and digital processors.

Full Adder

Full Adder: A full adder is a combinational logic circuit used to add three single-bit binary inputs. These inputs are two significant bits and one carry from the previous stage. It produces two outputs called Sum and Carry. A full adder overcomes the limitation of a half adder by considering the carry input.

Inputs and Outputs

  • Inputs: A, B, Carry-in (Cin)
  • Outputs: Sum (S), Carry-out (Cout)
  • Operation performed: A + B + Cin

Working Principle

  • The full adder adds three bits at the same time.
  • Sum is 1 when an odd number of inputs are 1.
  • Carry is generated when two or more inputs are 1.
  • Carry-out is passed to the next higher bit position.
  • Thus, a full adder is suitable for multi-bit binary addition.

Truth Table

A B Cin  Sum (S)  Carry (Cout)
0 0  0     0         0
0 0  1     1         0
0 1  0     1         0
0 1  1     0         1
1 0  0     1         0
1 0  1     0         1
1 1  0     0         1
1 1  1     1         1
  

Boolean Expressions

  • Sum: S = A ⊕ B ⊕ Cin
  • Carry: Cout = AB + B·Cin + A·Cin

Logic Circuit

A full adder can be constructed using two half adders and one OR gate:

  1. First half adder adds A and B.
  2. Second half adder adds the Sum and Cin.
  3. OR gate combines the carry outputs.

Advantages

  • Can add carry from previous stage.
  • Used for multi-bit addition.
  • Accurate and reliable.

Applications

  • Binary addition in computers.
  • Used in ALU.
  • Used in calculators.

Half Subtractor

Half Subtractor: A half subtractor is a combinational logic circuit used to subtract one single-bit binary number from another. It produces two outputs: Difference and Borrow. It is called a half subtractor because it does not consider any borrow input from a previous stage.

Inputs and Outputs

  • Inputs: A (Minuend), B (Subtrahend)
  • Outputs: Difference (D), Borrow (B)
  • Operation performed: A − B

Working Principle

  • If both inputs are equal, the Difference is 0 and Borrow is 0.
  • If A = 1 and B = 0, Difference is 1 and Borrow is 0.
  • If A = 0 and B = 1, Difference is 1 and Borrow is 1.
  • Borrow occurs only when A is smaller than B.
  • Thus, a half subtractor correctly subtracts two bits but cannot handle borrow from a previous stage.

Truth Table

A B  Difference (D)  Borrow
0 0       0            0
0 1       1            1
1 0       1            0
1 1       0            0
  

Boolean Expressions

From the truth table:

  • Difference: D = A ⊕ B
  • Borrow: Borrow = A’ · B

These expressions define the logic of the half subtractor.

Logic Circuit

  • An XOR gate is used to generate the Difference.
  • A NOT gate and an AND gate are used to generate the Borrow.
  • Thus, a half subtractor uses XOR, NOT, and AND gates.

Limitations

  • Cannot subtract borrow from previous stage.
  • Not suitable for multi-bit subtraction.
  • Used only as a basic building block.

Applications

  • Digital subtraction circuits.
  • Arithmetic Logic Unit (ALU).
  • Used in designing full subtractors.
  • Digital calculators and processors.

Full Subtractor

Full Subtractor: A full subtractor is a combinational logic circuit used to subtract three single-bit binary inputs. These inputs are the minuend (A), subtrahend (B), and borrow from the previous stage (Bin). It produces two outputs called Difference and Borrow-out. A full subtractor removes the limitation of a half subtractor by considering the borrow input.

Inputs and Outputs

  • Inputs: A (Minuend), B (Subtrahend), Bin (Borrow-in)
  • Outputs: Difference (D), Borrow-out (Bout)
  • Operation performed: A − B − Bin

Working Principle

  • The full subtractor subtracts three bits at the same time.
  • Difference becomes 1 when an odd number of inputs are 1.
  • Borrow-out is generated when A is smaller than B or Bin.
  • Borrow-out is passed to the next higher bit position.
  • Thus, a full subtractor is suitable for multi-bit binary subtraction.

Truth Table

A B Bin  Difference (D)  Borrow (Bout)
0 0  0       0               0
0 0  1       1               1
0 1  0       1               1
0 1  1       0               1
1 0  0       1               0
1 0  1       0               0
1 1  0       0               0
1 1  1       1               1
  

Boolean Expressions

  • Difference: D = A ⊕ B ⊕ Bin
  • Borrow-out: Bout = A’B + A’Bin + B·Bin

Logic Circuit

  • A full subtractor can be designed using two half subtractors and one OR gate.
  • First half subtractor subtracts A and B.
  • Second half subtractor subtracts Difference and Bin.
  • OR gate combines the borrow outputs.

Advantages

  • Can handle borrow from previous stage.
  • Suitable for multi-bit subtraction.
  • More accurate than half subtractor.

Applications

  • Binary subtraction in computers.
  • Digital calculators.
  • Arithmetic Logic Unit (ALU).

Multiplexer (MUX)

Multiplexer (MUX): A multiplexer is a combinational logic circuit that selects one input from multiple input lines and forwards it to a single output line. The selection of a particular input is controlled by a set of select lines. Because it selects one data input at a time, a multiplexer is also called a data selector. Multiplexers play an important role in digital systems to reduce hardware and efficiently route data.

Basic Principle of Multiplexer

  • The working of a multiplexer is based on the number of select lines.
  • If the number of select lines is n, then the number of input lines is 2ⁿ.
  • Only one input is connected to the output at any time.

Main Components of a Multiplexer

A multiplexer consists of the following parts:

  1. Data input lines (I₀, I₁, I₂, …)
  2. Select lines (S₀, S₁, S₂, …)
  3. Single output line (Y)

Select lines decide which input will appear at the output.

Types of Multiplexers

2:1 Multiplexer

A 2:1 multiplexer has inputs A and B, one select line S, and one output Y.

Working:

  • When S = 0 → Output Y = A
  • When S = 1 → Output Y = B

Boolean Expression: Y = A·S’ + B·S

This is the simplest multiplexer and is used as a basic building block.

4:1 Multiplexer

A 4:1 multiplexer has four inputs: I₀, I₁, I₂, I₃; two select lines: S₀, S₁; and one output.

Working: Depending on the binary value of the select lines, one input is selected.

S1 S0  Output
0  0   I0
0  1   I1
1  0   I2
1  1   I3
  

This type of multiplexer is widely used in digital circuits and in cascading configurations.

8:1 Multiplexer

An 8:1 multiplexer has eight input lines (I₀ to I₇), three select lines (S₀, S₁, S₂), and one output.

Working: Each combination of select lines chooses one of the eight inputs and connects it to the output.

16:1 Multiplexer

A 16:1 multiplexer has sixteen inputs (I₀ to I₁₅) and four select lines (S₀, S₁, S₂, S₃). Used in complex systems where a large number of inputs need to be selected efficiently.

Cascaded Multiplexer

When a large multiplexer is not available, smaller multiplexers are connected together to form a larger one.

Example: Two 4:1 multiplexers and one 2:1 multiplexer can be used to design an 8:1 multiplexer. This method is called cascading.

Logic Implementation of Multiplexer

Multiplexers are implemented using:

  • AND gates
  • OR gates
  • NOT gates

Each input is ANDed with the appropriate select line combination, and all results are ORed to get the final output.

Applications of Multiplexers

  • Data routing in digital systems.
  • Used in CPU, ALU, and control units.
  • Parallel-to-serial data conversion.
  • Communication systems.
  • Implementation of Boolean functions.

Advantages of Multiplexers

  • Reduces hardware and wiring.
  • Saves cost and space.
  • Efficient data selection.
  • Simplifies digital circuit design.

Limitations of Multiplexers

  • Only one input can be selected at a time.
  • Delay increases with an increase in the number of inputs.
  • Requires additional select lines.