Advantages and Disadvantages of Status-Polling and Interrupt-Driven I/O
Q1 State the advantages and disadvantages of Status-polling I/O and Interrupt-driven I/O.
In program controlled I/O, the CPU repeatedly checks a status flag to achieve the required synchronization between the CPU and the input device. The program enters a wait loop in which it repeatedly tests the device status. During this period, the CPU is not performing any useful computation. In interrupt I/O, other tasks can be performed while the CPU waits for an I/O device to become ready. The CPU allows normal program execution to be interrupted by some external signals from I/O devices. When interrupted, it stops executing its current program and enters an interrupt sequence. The status of the current program is saved before entering the interrupt service routine (ISR) that services the interrupt.
Q2 Why is DMA data transfer faster than doing the same data transfer with program instructions?
It allows the I/O DMA device to directly control the three buses (control bus, data bus, address bus) to perform the read/write operations on the memory locations. I/O device DMA places the address on the address bus from its address counter, accesses the data, and does not need to fetch instructions.
Q3 Describe in general terms the steps a microprocessor will take when it responds to an interrupt.
The device raises an interrupt request. 1. Finishes executing the current instruction. 2. Pushes the PC of the next instruction onto the stack. 3. Jumps to the interrupt vector table to get the address of ISR and jumps to it. 4. Begins executing the ISR instructions to the last instruction of ISR (RETFIE). 5. Executes RETFIE. 6. Pops the PC from the stack. 7. Starts to execute from the address of that PC.
Q4 What are the differences between the RETURN instruction and the RETFIE instruction?
Executes RETFIE. Pops the PC from the hardware stack; Sets GIE; Loads status, W, BSR from internal registers; Executes RETURN; Pops the PC from the hardware stack.
Q5 Which technique, interrupt or program I/O, avoids tying down the microcontroller?
Interrupt I/O.
Q6 List some of the interrupt sources in the PIC18?
Timer, hardware, serial.
Q7 In the PIC18, what program area is assigned to the interrupt vector table?
0x0008 and 0x0018.
Q8 Why do we put GOTO (BRA) instruction at address 0?
To bypass the interrupt vector table.
Q9 What address in the interrupt vector table is assigned to INT0, INT1, and INT2? How about the pin numbers on PORTB for external interrupt?
0x0008 if high priority and 0x0018 if low priority, PORTB.0, PORTB.1, PORTB.2.
Q10 Show how to enable all three external hardware interrupts?
BSF INTCON, INT0IE. BSF INTCON3, INT1IE. BSF INTCON3, INT2IE. Of course, you also need to BSF INTCON, GIE.
Q11 Explain the role of INT0IF and INT0IE in the execution of INT0.
In order to allow the interrupt to come in, INT0IE must be set to high. It is only after INT0IE = 1, that INT0IF being high will cause the CPU to jump to a vector location. INT0IF can become high by an external pulse or by an instruction. In some applications to simulate interrupts, we can use an instruction to set INT0IF to cause an interrupt.
Q12 In a PIC18 system, INT0, INT1, and INT2 are used. They are assigned to high priority (vector address is 0x0008). How to identify the source of the interrupt?
At 0x0008, we should use a polling technique to identify the device.
ORG 0000H GOTO MAIN ORG 0008H GOTO check ORG 00100H :Main program
check BTFSC INTCON, INT0IF RCALL INT0_ISR BTFSC INTCON3, INT1IF RCALL INT1_ISR BTFSC INTCON3, INT2IF RCALL INT2_ISR RETFIE INT0_ISR BCF INTCON, INT0IF RETURN INT1_ISR BCF INTCON3, INT1IF RETURN INT2_ISR BCF INTCON3, INT1IF RETURN END
Q13 Provide the following information for the PORTB Change interrupt?
(a) the flag associated with the PORTB change interrupt. (b) the register to which these flags belong (c) the difference between the PORTB Change and INT0-2 interrupts (d) the pins that are part of the PORTB Change interrupt a. RBIF b. INTCON c. For PORTB-change, there is only a single flag associated with it and it is triggered on positive and negative edges. d. Pins 37 (RB4), 38 (RB5), 39 (RB6), and 40 (RB7)